/* '%'= 32 bit '*'= 16 bit '!'= don't switch modes '&'= default '-'= NoRex '='= Rex 0x48 only if 64-bit code segment '~'= Rex 0x40 '`'= Rex only R8-R15 '^'= Rex xor-like ':'= floating sti-like for disassembly '$'= ending zero (ENTER) Note: LoseThos uses nonstandard opcodes. Asm is kind-of a bonus and I made changes to make the assembler simpler. For opcodes which can have different numbers of args, I separated them out -- Like IMUL and IMUL2. The assembler will not report certain invalid forms. Get an Intel datasheet and learn which forms are valid. */ R8 AL 0; R8 CL 1; R8 DL 2; R8 BL 3; R8 AH 4; R8 CH 5; R8 DH 6; R8 BH 7; R8 R8u8 8; R8 R9u8 9; R8 R10u8 10; R8 R11u8 11; R8 R12u8 12; R8 R13u8 13; R8 R14u8 14; R8 R15u8 15; R8 RSPu8 20; R8 RBPu8 21; R8 RSIu8 22; R8 RDIu8 23; R16 AX 0; R16 CX 1; R16 DX 2; R16 BX 3; R16 SP 4; R16 BP 5; R16 SI 6; R16 DI 7; R16 R8u16 8; R16 R9u16 9; R16 R10u16 10; R16 R11u16 11; R16 R12u16 12; R16 R13u16 13; R16 R14u16 14; R16 R15u16 15; R32 EAX 0; R32 ECX 1; R32 EDX 2; R32 EBX 3; R32 ESP 4; R32 EBP 5; R32 ESI 6; R32 EDI 7; R32 R8u32 8; R32 R9u32 9; R32 R10u32 10; R32 R11u32 11; R32 R12u32 12; R32 R13u32 13; R32 R14u32 14; R32 R15u32 15; R64 RAX 0; R64 RCX 1; R64 RDX 2; R64 RBX 3; R64 RSP 4; R64 RBP 5; R64 RSI 6; R64 RDI 7; R64 R8 8; R64 R9 9; R64 R10 10; R64 R11 11; R64 R12 12; R64 R13 13; R64 R14 14; R64 R15 15; R64 R8u64 8; R64 R9u64 9; R64 R10u64 10; R64 R11u64 11; R64 R12u64 12; R64 R13u64 13; R64 R14u64 14; R64 R15u64 15; SEG ES 0; SEG CS 1; SEG SS 2; SEG DS 3; SEG FS 4; SEG GS 5; FSTK ST0 0; FSTK ST1 1; FSTK ST2 2; FSTK ST3 3; FSTK ST4 4; FSTK ST5 5; FSTK ST6 6; FSTK ST7 7; MM MM0 0; MM MM1 1; MM MM2 2; MM MM3 3; MM MM4 4; MM MM5 5; MM MM6 6; MM MM7 7; XMM XMM0 0; XMM XMM1 1; XMM XMM2 2; XMM XMM3 3; XMM XMM4 4; XMM XMM5 5; XMM XMM6 6; XMM XMM7 7; KEYWORD include 0; KEYWORD define 1; KEYWORD union 2; KEYWORD catch 3; KEYWORD class 4; KEYWORD struct 4; KEYWORD try 5; KEYWORD if 6; KEYWORD else 7; KEYWORD for 8; KEYWORD while 9; KEYWORD extern 10; KEYWORD LTextern 11; KEYWORD return 12; KEYWORD sizeof 13; KEYWORD LTintern 14; KEYWORD do 15; KEYWORD asm 16; KEYWORD goto 17; KEYWORD exe 18; KEYWORD break 19; KEYWORD switch 20; KEYWORD nobound_switch 21; KEYWORD case 22; KEYWORD default 23; KEYWORD public 24; KEYWORD offset 25; KEYWORD import 26; KEYWORD LTimport 27; KEYWORD ifdef 28; KEYWORD ifndef 29; KEYWORD ifstatic 30; KEYWORD ifnstatic 31; KEYWORD endif 32; KEYWORD assert 33; KEYWORD reg 34; KEYWORD noreg 35; KEYWORD nounusedwarn 36; KEYWORD help_index 37; KEYWORD help_file 38; KEYWORD unsigned 39; KEYWORD typedef 40; KEYWORD static 41; KEYWORD interrupt 42; KEYWORD lock 43; KEYWORD defined 44; KEYWORD argpop 45; KEYWORD noargpop 46; ASM_KEYWORD ALIGN 64; ASM_KEYWORD END 65; ASM_KEYWORD I0 66; ASM_KEYWORD I8 67; ASM_KEYWORD char 67; ASM_KEYWORD I16 68; ASM_KEYWORD short 68; ASM_KEYWORD I32 69; ASM_KEYWORD int 69; ASM_KEYWORD I64 70; ASM_KEYWORD long 70; ASM_KEYWORD U0 71; ASM_KEYWORD void 71; ASM_KEYWORD U8 72; ASM_KEYWORD U16 73; ASM_KEYWORD U32 74; ASM_KEYWORD U64 75; ASM_KEYWORD F64 76; ASM_KEYWORD double 76; ASM_KEYWORD DU8 77; ASM_KEYWORD DU16 78; ASM_KEYWORD DU32 79; ASM_KEYWORD DU64 80; ASM_KEYWORD DUP 81; ASM_KEYWORD STRUC 82; ASM_KEYWORD ENDS 83; ASM_KEYWORD USE16 84; ASM_KEYWORD USE32 85; ASM_KEYWORD USE64 86; ASM_KEYWORD IMPORT 87; ASM_KEYWORD EXPORT 88; ASM_KEYWORD LIST 89; ASM_KEYWORD NOLIST 90; OPCODE PUSH 0x0E NO CS 0x16 NO SS 0x1E NO DS 0x06 NO ES 0x0F 0xA0 NO FS 0x0F 0xA8 NO GS 0x6A &IB IMM8 0x68 *!IW IMM16 0x68 %!ID IMM32 0x50 +*RW R16 0x50 +%RD R32 0x50 +%`RD R64 0xFF /6 *NO RM16 0xFF /6 %NO RM32 0xFF /6 %NO RM64; OPCODE PUSHAW 0x60 *NO; OPCODE PUSHAD 0x60 %NO; OPCODE PUSHFW 0x9C *NO; OPCODE PUSHFD 0x9C %NO; OPCODE POP 0x1F NO DS 0x07 NO ES 0x17 NO SS 0x0F 0xA1 NO FS 0x0F 0xA9 NO GS 0x58 +*RW R16 0x58 +%RD R32 0x58 +%`RD R64 0x8F /0 *NO RM16 0x8F /0 %NO RM32 0x8F /0 %NO RM64; OPCODE POPAW 0x61 *NO; OPCODE POPAD 0x61 %NO; OPCODE POPFW 0x9D *NO; OPCODE POPFD 0x9D %NO; OPCODE MOV // 0xA0 NO AL MOFFS8 0xA1 *NO AX MOFFS16 0xA1 %NO EAX MOFFS32 // 0xA2 NO MOFFS8 AL 0xA3 *NO MOFFS16 AX 0xA3 %NO MOFFS32 EAX 0x8A /R NO R8 RM8 0x8B /R *NO R16 RM16 0x8B /R %NO R32 RM32 0x8B /R %NO R64 RM64 0x88 /R NO RM8 R8 0x89 /R *NO RM16 R16 0x89 /R %NO RM32 R32 0x89 /R %NO RM64 R64 0x8C /R %NO RM16 SREG 0x8E /R %NO SREG RM16 0xB0 +RB R8 UIMM8 0xB8 +*RW R16 UIMM16 0xB8 +%RD R32 UIMM32 0xB8 +%RD R64 UIMM64 0xC6 NO RM8 UIMM8 0xC7 *NO RM16 UIMM16 0xC7 %NO RM32 UIMM32 0xC7 %NO RM64 IMM32; OPCODE ADC 0x14 IB AL UIMM8 0x15 *IW AX UIMM16 0x15 %ID EAX UIMM32 0x80 /2 IB RM8 IMM8 0x83 /2 *IB RM16 IMM8 0x83 /2 %IB RM32 IMM8 0x83 /2 %IB RM64 IMM8 0x81 /2 *IW RM16 IMM16 0x81 /2 %ID RM32 IMM32 0x81 /2 %ID RM64 IMM32 0x12 /R NO R8 RM8 0x13 /R *NO R16 RM16 0x13 /R %NO R32 RM32 0x13 /R %NO R64 RM64 0x10 /R NO RM8 R8 0x11 /R *NO RM16 R16 0x11 /R %NO RM32 R32 0x11 /R %NO RM64 R64; OPCODE ADD 0x04 IB AL UIMM8 0x05 *IW AX UIMM16 0x05 %ID EAX UIMM32 0x80 /0 IB RM8 UIMM8 0x83 /0 *IB RM16 IMM8 0x83 /0 %IB RM32 IMM8 0x83 /0 %IB RM64 IMM8 0x81 /0 *IW RM16 IMM16 0x81 /0 %ID RM32 IMM32 0x81 /0 %ID RM64 IMM32 0x02 /R NO R8 RM8 0x03 /R *NO R16 RM16 0x03 /R %NO R32 RM32 0x03 /R %NO R64 RM64 0x00 /R NO RM8 R8 0x01 /R *NO RM16 R16 0x01 /R %NO RM32 R32 0x01 /R %NO RM64 R64; OPCODE AND 0x24 IB AL UIMM8 0x25 *IW AX UIMM16 0x25 %ID EAX UIMM32 0x80 /4 IB RM8 UIMM8 0x83 /4 *IB RM16 IMM8 0x83 /4 %IB RM32 IMM8 0x83 /4 %IB RM64 IMM8 0x81 /4 *IW RM16 IMM16 0x81 /4 %ID RM32 IMM32 0x81 /4 %ID RM64 IMM32 0x22 /R NO R8 RM8 0x23 /R *NO R16 RM16 0x23 /R %NO R32 RM32 0x23 /R %NO R64 RM64 0x20 /R NO RM8 R8 0x21 /R *NO RM16 R16 0x21 /R %NO RM32 R32 0x21 /R %NO RM64 R64; OPCODE CMP 0x3C IB AL UIMM8 0x3D *IW AX UIMM16 0x3D %ID EAX UIMM32 0x80 /7 IB RM8 UIMM8 0x83 /7 *IB RM16 IMM8 0x83 /7 %IB RM32 IMM8 0x83 /7 %IB RM64 IMM8 0x81 /7 *IW RM16 IMM16 0x81 /7 %ID RM32 IMM32 0x81 /7 %ID RM64 IMM32 0x3A /R NO R8 RM8 0x3B /R *NO R16 RM16 //ERROR? 0x3B /R %NO R32 RM32 0x3B /R %NO R64 RM64 0x38 /R NO RM8 R8 0x39 /R *NO RM16 R16 0x39 /R %NO RM32 R32 0x39 /R %NO RM64 R64; OPCODE OR 0x0C IB AL UIMM8 0x0D *IW AX UIMM16 0x0D %ID EAX UIMM32 0x80 /1 IB RM8 UIMM8 0x83 /1 *IB RM16 IMM8 0x83 /1 %IB RM32 IMM8 0x83 /1 %IB RM64 IMM8 0x81 /1 *IW RM16 IMM16 0x81 /1 %ID RM32 IMM32 0x81 /1 %ID RM64 IMM32 0x0A /R NO R8 RM8 0x0B /R *NO R16 RM16 0x0B /R %NO R32 RM32 0x0B /R %NO R64 RM64 0x08 /R NO RM8 R8 0x09 /R *NO RM16 R16 0x09 /R %NO RM32 R32 0x09 /R %NO RM64 R64; OPCODE SBB 0x1C IB AL UIMM8 0x1D *IW AX UIMM16 0x1D %ID EAX UIMM32 0x80 /3 IB RM8 UIMM8 0x83 /3 *IB RM16 IMM8 0x83 /3 %IB RM32 IMM8 0x83 /3 %IB RM64 IMM8 0x81 /3 *IW RM16 IMM16 0x81 /3 %ID RM32 IMM32 0x81 /3 %ID RM64 IMM32 0x1A /R NO R8 RM8 0x1B /R *NO R16 RM16 0x1B /R %NO R32 RM32 0x1B /R %NO R64 RM64 0x18 /R NO RM8 R8 0x19 /R *NO RM16 R16 0x19 /R %NO RM32 R32 0x19 /R %NO RM64 R64; OPCODE SUB 0x2C IB AL UIMM8 0x2D *IW AX UIMM16 0x2D %ID EAX UIMM32 0x80 /5 IB RM8 UIMM8 0x83 /5 *IB RM16 IMM8 0x83 /5 %IB RM32 IMM8 0x83 /5 %IB RM64 IMM8 0x81 /5 *IW RM16 IMM16 0x81 /5 %ID RM32 IMM32 0x81 /5 %ID RM64 IMM32 0x2A /R NO R8 RM8 0x2B /R *NO R16 RM16 0x2B /R %NO R32 RM32 0x2B /R %NO R64 RM64 0x28 /R NO RM8 R8 0x29 /R *NO RM16 R16 0x29 /R %NO RM32 R32 0x29 /R %NO RM64 R64; OPCODE TEST 0xA8 IB AL UIMM8 0xA9 *IW AX UIMM16 0xA9 %ID EAX UIMM32 0xF6 /0 IB RM8 UIMM8 0xF7 /0 *IW RM16 IMM16 0xF7 /0 %ID RM32 IMM32 0xF7 /0 %ID RM64 IMM32 0x84 /R NO RM8 R8 0x85 /R *NO RM16 R16 0x85 /R %NO RM32 R32 0x85 /R %NO RM64 R64; OPCODE NOP 0x90 NO; OPCODE XCHG 0x90 +/R *NO R16 AX 0x90 +/R *NO AX R16 0x90 +/R %NO R32 EAX 0x90 +/R %NO EAX R32 0x86 /R NO R8 RM8 0x87 /R *NO R16 RM16 0x87 /R %NO R32 RM32 0x87 /R %NO R64 RM64 0x86 /R NO RM8 R8 0x87 /R *NO RM16 R16 0x87 /R %NO RM32 R32 0x87 /R %NO RM64 R64; OPCODE XOR 0x34 IB AL UIMM8 0x35 *IW AX UIMM16 0x35 %ID EAX UIMM32 0x80 /6 IB RM8 UIMM8 0x83 /6 *IB RM16 IMM8 0x83 /6 %IB RM32 IMM8 0x83 /6 %IB RM64 IMM8 0x81 /6 *IW RM16 IMM16 0x81 /6 %ID RM32 IMM32 0x81 /6 %ID RM64 IMM32 0x32 /R NO R8 RM8 0x33 /R *NO R16 RM16 0x33 /R %NO R32 RM32 0x33 /R %^NO R64 RM64 0x30 /R NO RM8 R8 0x31 /R *NO RM16 R16 0x31 /R %NO RM32 R32 0x31 /R %^NO RM64 R64; OPCODE CMOVA 0x0F 0x47 /R *NO R16 RM16 0x0F 0x47 /R %NO R32 RM32 0x0F 0x47 /R %NO R64 RM64; OPCODE CMOVAE 0x0F 0x43 /R *NO R16 RM16 0x0F 0x43 /R %NO R32 RM32 0x0F 0x43 /R %NO R64 RM64; OPCODE CMOVB 0x0F 0x42 /R *NO R16 RM16 0x0F 0x42 /R %NO R32 RM32 0x0F 0x42 /R %NO R64 RM64; OPCODE CMOVBE 0x0F 0x46 /R *NO R16 RM16 0x0F 0x46 /R %NO R32 RM32 0x0F 0x46 /R %NO R64 RM64; OPCODE CMOVC 0x0F 0x42 /R *NO R16 RM16 0x0F 0x42 /R %NO R32 RM32 0x0F 0x42 /R %NO R64 RM64; OPCODE CMOVE 0x0F 0x44 /R *NO R16 RM16 0x0F 0x44 /R %NO R32 RM32 0x0F 0x44 /R %NO R64 RM64; OPCODE CMOVG 0x0F 0x4F /R *NO R16 RM16 0x0F 0x4F /R %NO R32 RM32 0x0F 0x4F /R %NO R64 RM64; OPCODE CMOVGE 0x0F 0x4D /R *NO R16 RM16 0x0F 0x4D /R %NO R32 RM32 0x0F 0x4D /R %NO R64 RM64; OPCODE CMOVL 0x0F 0x4C /R *NO R16 RM16 0x0F 0x4C /R %NO R32 RM32 0x0F 0x4C /R %NO R64 RM64; OPCODE CMOVLE 0x0F 0x4E /R *NO R16 RM16 0x0F 0x4E /R %NO R32 RM32 0x0F 0x4E /R %NO R64 RM64; OPCODE CMOVNA 0x0F 0x46 /R *NO R16 RM16 0x0F 0x46 /R %NO R32 RM32 0x0F 0x46 /R %NO R64 RM64; OPCODE CMOVNAE 0x0F 0x42 /R *NO R16 RM16 0x0F 0x42 /R %NO R32 RM32 0x0F 0x42 /R %NO R64 RM64; OPCODE CMOVNB 0x0F 0x43 /R *NO R16 RM16 0x0F 0x43 /R %NO R32 RM32 0x0F 0x43 /R %NO R64 RM64; OPCODE CMOVNBE 0x0F 0x47 /R *NO R16 RM16 0x0F 0x47 /R %NO R32 RM32 0x0F 0x47 /R %NO R64 RM64; OPCODE CMOVNC 0x0F 0x43 /R *NO R16 RM16 0x0F 0x43 /R %NO R32 RM32 0x0F 0x43 /R %NO R64 RM64; OPCODE CMOVNE 0x0F 0x45 /R *NO R16 RM16 0x0F 0x45 /R %NO R32 RM32 0x0F 0x45 /R %NO R64 RM64; OPCODE CMOVNG 0x0F 0x4E /R *NO R16 RM16 0x0F 0x4E /R %NO R32 RM32 0x0F 0x4E /R %NO R64 RM64; OPCODE CMOVNGE 0x0F 0x4C /R *NO R16 RM16 0x0F 0x4C /R %NO R32 RM32 0x0F 0x4C /R %NO R64 RM64; OPCODE CMOVNL 0x0F 0x4D /R *NO R16 RM16 0x0F 0x4D /R %NO R32 RM32 0x0F 0x4D /R %NO R64 RM64; OPCODE CMOVNLE 0x0F 0x4F /R *NO R16 RM16 0x0F 0x4F /R %NO R32 RM32 0x0F 0x4F /R %NO R64 RM64; OPCODE CMOVNO 0x0F 0x41 /R *NO R16 RM16 0x0F 0x41 /R %NO R32 RM32 0x0F 0x41 /R %NO R64 RM64; OPCODE CMOVNP 0x0F 0x4B /R *NO R16 RM16 0x0F 0x4B /R %NO R32 RM32 0x0F 0x4B /R %NO R64 RM64; OPCODE CMOVNS 0x0F 0x49 /R *NO R16 RM16 0x0F 0x49 /R %NO R32 RM32 0x0F 0x49 /R %NO R64 RM64; OPCODE CMOVNZ 0x0F 0x45 /R *NO R16 RM16 0x0F 0x45 /R %NO R32 RM32 0x0F 0x45 /R %NO R64 RM64; OPCODE CMOVO 0x0F 0x40 /R *NO R16 RM16 0x0F 0x40 /R %NO R32 RM32 0x0F 0x40 /R %NO R64 RM64; OPCODE CMOVP 0x0F 0x4A /R *NO R16 RM16 0x0F 0x4A /R %NO R32 RM32 0x0F 0x4A /R %NO R64 RM64; OPCODE CMOVPE 0x0F 0x4A /R *NO R16 RM16 0x0F 0x4A /R %NO R32 RM32 0x0F 0x4A /R %NO R64 RM64; OPCODE CMOVPO 0x0F 0x4B /R *NO R16 RM16 0x0F 0x4B /R %NO R32 RM32 0x0F 0x4B /R %NO R64 RM64; OPCODE CMOVS 0x0F 0x48 /R *NO R16 RM16 0x0F 0x48 /R %NO R32 RM32 0x0F 0x48 /R %NO R64 RM64; OPCODE CMOVZ 0x0F 0x44 /R *NO R16 RM16 0x0F 0x44 /R %NO R32 RM32 0x0F 0x44 /R %NO R64 RM64; OPCODE CALL 0xE8 *!&CW REL16 0xFF /2 *!NO RM16 0xE8 %!&CD REL32 0xFF /2 %!NO RM32 0xFF /2 %!`NO RM64 // 0x9A CD PTR1616 // 0xFF /3 *NO M1616 // 0x9A *CP PTR1632 // 0x9A %CP PTR3232 // 0xFF /3 %NO M1632 ; OPCODE JMP 0xEB &CB REL8 0xE9 *!CW REL16 0xE9 %!CD REL32 0xFF /4 *!NO RM16 0xFF /4 %!NO RM32 0xFF /4 %!NO RM64; OPCODE JA 0x77 &CB REL8 0x0F 0x87 *!CW REL16 0x0F 0x87 %!CD REL32; OPCODE JAE 0x73 &CB REL8 0x0F 0x83 *!CW REL16 0x0F 0x83 %!CD REL32; OPCODE JB 0x72 &CB REL8 0x0F 0x82 *!CW REL16 0x0F 0x82 %!CD REL32; OPCODE JBE 0x76 &CB REL8 0x0F 0x86 *!CW REL16 0x0F 0x86 %!CD REL32; OPCODE JC 0x72 &CB REL8 0x0F 0x82 *!CW REL16 0x0F 0x82 %!CD REL32; OPCODE JCXZ 0xE3 CB REL8; OPCODE JECXZ 0xE3 CB REL8; OPCODE JE 0x74 &CB REL8 0x0F 0x84 *!CW REL16 0x0F 0x84 %!CD REL32; OPCODE JG 0x7F &CB REL8 0x0F 0x8F *!CW REL16 0x0F 0x8F %!CD REL32; OPCODE JGE 0x7D &CB REL8 0x0F 0x8D *!CW REL16 0x0F 0x8D %!CD REL32; OPCODE JL 0x7C &CB REL8 0x0F 0x8C *!CW REL16 0x0F 0x8C %!CD REL32; OPCODE JLE 0x7E &CB REL8 0x0F 0x8E *!CW REL16 0x0F 0x8E %!CD REL32; OPCODE JNA 0x76 &CB REL8 0x0F 0x86 *!CW REL16 0x0F 0x86 %!CD REL32; OPCODE JNAE 0x72 &CB REL8 0x0F 0x82 *!CW REL16 0x0F 0x82 %!CD REL32; OPCODE JNB 0x73 &CB REL8 0x0F 0x83 *!CW REL16 0x0F 0x83 %!CD REL32; OPCODE JNBE 0x77 &CB REL8 0x0F 0x87 *!CW REL16 0x0F 0x87 %!CD REL32; OPCODE JNC 0x73 &CB REL8 0x0F 0x83 *!CW REL16 0x0F 0x83 %!CD REL32; OPCODE JNE 0x75 &CB REL8 0x0F 0x85 *!CW REL16 0x0F 0x85 %!CD REL32; OPCODE JNG 0x7E &CB REL8 0x0F 0x8E *!CW REL16 0x0F 0x8E %!CD REL32; OPCODE JNGE 0x7C &CB REL8 0x0F 0x8C *!CW REL16 0x0F 0x8C %!CD REL32; OPCODE JNL 0x7D &CB REL8 0x0F 0x8D *!CW REL16 0x0F 0x8D %!CD REL32; OPCODE JNLE 0x7F &CB REL8 0x0F 0x8F *!CW REL16 0x0F 0x8F %!CD REL32; OPCODE JNO 0x71 &CB REL8 0x0F 0x81 *!CW REL16 0x0F 0x81 %!CD REL32; OPCODE JNP 0x7B &CB REL8 0x0F 0x8B *!CW REL16 0x0F 0x8B %!CD REL32; OPCODE JNS 0x79 &CB REL8 0x0F 0x89 *!CW REL16 0x0F 0x89 %!CD REL32; OPCODE JNZ 0x75 &CB REL8 0x0F 0x85 *!CW REL16 0x0F 0x85 %!CD REL32; OPCODE JO 0x70 &CB REL8 0x0F 0x80 *!CW REL16 0x0F 0x80 %!CD REL32; OPCODE JP 0x7A &CB REL8 0x0F 0x8A *!CW REL16 0x0F 0x8A %!CD REL32; OPCODE JPE 0x7A &CB REL8 0x0F 0x8A *!CW REL16 0x0F 0x8A %!CD REL32; OPCODE JPO 0x7B &CB REL8 0x0F 0x8B *!CW REL16 0x0F 0x8B %!CD REL32; OPCODE JS 0x78 &CB REL8 0x0F 0x88 *!CW REL16 0x0F 0x88 %!CD REL32; OPCODE JZ 0x74 &CB REL8 0x0F 0x84 *!CW REL16 0x0F 0x84 %!CD REL32; OPCODE INC // 0x40 +*RW R16 // 0x40 +%RD R32 0xFE /0 NO RM8 0xFF /0 *NO RM16 0xFF /0 %NO RM32 0xFF /0 %NO RM64; OPCODE DEC // 0x48 +*RW R16 // 0x48 +%RD R32 0xFE /1 NO RM8 0xFF /1 *NO RM16 0xFF /1 %NO RM32 0xFF /1 %NO RM64; OPCODE NOT 0xF6 /2 NO RM8 0xF7 /2 *NO RM16 0xF7 /2 %NO RM32 0xF7 /2 %NO RM64; OPCODE NEG 0xF6 /3 NO RM8 0xF7 /3 *NO RM16 0xF7 /3 %NO RM32 0xF7 /3 %NO RM64; OPCODE MUL 0xF6 /4 NO RM8 0xF7 /4 *NO RM16 0xF7 /4 %NO RM32 0xF7 /4 %NO RM64; OPCODE IMUL 0xF6 /5 NO RM8 0xF7 /5 *NO RM16 0xF7 /5 %NO RM32 0xF7 /5 %NO RM64; OPCODE IMUL2 0x0F 0xAF /R *NO R16 RM16 0x0F 0xAF /R %NO R32 RM32 0x0F 0xAF /R %NO R64 RM64 0x6B /R *IB RM16 IMM8 0x6B /R %IB RM32 IMM8 0x6B /R %IB RM64 IMM8 0x69 /R *IW RM16 UIMM16 0x69 /R %ID RM32 UIMM32 0x69 /R %ID RM64 UIMM32; OPCODE DIV 0xF6 /6 NO RM8 0xF7 /6 *NO RM16 0xF7 /6 %NO RM32 0xF7 /6 %NO RM64; OPCODE IDIV 0xF6 /7 NO RM8 0xF7 /7 *NO RM16 0xF7 /7 %NO RM32 0xF7 /7 %NO RM64; OPCODE AAA 0x37 NO; OPCODE AAD 0xD5 0x0A NO; OPCODE AAM 0xD4 0x0A NO; OPCODE AAS 0x3F NO; OPCODE ARPL 0x63 /R NO RM16 R16; OPCODE BOUND 0x62 /R *NO RM16 R16 0x62 /R %NO RM32 R32 0x62 /R %NO RM64 R64; OPCODE BSF 0x0F 0xBC /R *NO R16 RM16 0x0F 0xBC /R %NO R32 RM32 0x0F 0xBC /R %NO R64 RM64; OPCODE BSR 0x0F 0xBD /R *NO R16 RM16 0x0F 0xBD /R %NO R32 RM32 0x0F 0xBD /R %NO R64 RM64; OPCODE BSWAP 0x0F 0xC8 /R %NO R32 0x0F 0xC8 /R %NO R64; OPCODE BT 0x0F 0xA3 /R *NO RM16 R16 0x0F 0xA3 /R %NO RM32 R32 0x0F 0xA3 /R %NO RM64 R64 0x0F 0xBA /4 *IB RM16 UIMM8 0x0F 0xBA /4 %IB RM32 UIMM8 0x0F 0xBA /4 %IB RM64 UIMM8; OPCODE BTC 0x0F 0xBB /R *NO RM16 R16 0x0F 0xBB /R %NO RM32 R32 0x0F 0xBB /R %NO RM64 R64 0x0F 0xBA /7 *IB RM16 UIMM8 0x0F 0xBA /7 %IB RM32 UIMM8 0x0F 0xBA /7 %IB RM64 UIMM8; OPCODE BTR 0x0F 0xB3 /R *NO RM16 R16 0x0F 0xB3 /R %NO RM32 R32 0x0F 0xB3 /R %NO RM64 R64 0x0F 0xBA /6 *IB RM16 UIMM8 0x0F 0xBA /6 %IB RM32 UIMM8 0x0F 0xBA /6 %IB RM64 UIMM8; OPCODE BTS 0x0F 0xAB /R *NO RM16 R16 0x0F 0xAB /R %NO RM32 R32 0x0F 0xAB /R %NO RM64 R64 0x0F 0xBA /5 *IB RM16 UIMM8 0x0F 0xBA /5 %IB RM32 UIMM8 0x0F 0xBA /5 %IB RM64 UIMM8; OPCODE CBW 0x98 *NO; OPCODE CWDE 0x98 %NO; OPCODE CDQE 0x98 %=NO; OPCODE CWD 0x99 *NO; OPCODE CDQ 0x99 %NO; OPCODE CQO 0x99 %=NO; OPCODE CLC 0xF8 NO; OPCODE CLD 0xFC NO; OPCODE CLI 0xFA NO; OPCODE CLTS 0x0F 0x06 NO; OPCODE CMC 0xF5 NO; OPCODE CMPSB 0xA6 NO; OPCODE CMPSW 0xA7 *NO; OPCODE CMPSD 0xA7 %NO; OPCODE CMPSQ 0xA7 %=NO; OPCODE CMPXCHG 0x0F 0xB0 /R NO RM8 R8 0x0F 0xB1 /R *NO RM16 R16 0x0F 0xB1 /R %NO RM32 R32 0x0F 0xB1 /R %NO RM64 R64; OPCODE CHPXCHG8B 0x0F 0xC7 NO RM64; OPCODE DAA 0x27 NO; OPCODE DAS 0x2F NO; OPCODE ENTER 0xC8 $IW IMM16; OPCODE HLT 0xF4 NO; OPCODE IN 0xE4 IB AL UIMM8 0xE5 *IB AX UIMM8 0xE5 %IB EAX UIMM8 0xEC NO AL DX 0xED *NO AX DX 0xED %NO EAX DX; OPCODE INS 0x6C NO RM8 DX 0x6D *NO RM16 DX 0x6D %NO RM32 DX; OPCODE INSB 0x6C NO; OPCODE INSW 0x6D *NO; OPCODE INSD 0x6D %NO; OPCODE INTO 0xCE NO; OPCODE INT3 0xCC NO; OPCODE INT 0xCD IB UIMM8; OPCODE INVD 0x0F 0x08 NO; OPCODE IRET 0xCF %=NO; OPCODE LAHF 0x9F NO; OPCODE LAR 0x0F 0x02 /R *NO R16 RM16 0x0F 0x02 /R %NO R32 RM32 0x0F 0x02 /R %NO R64 RM64; OPCODE LEA 0x8D /R *NO R16 RM16 0x8D /R %NO R32 RM32 0x8D /R %NO R64 RM64; OPCODE LEAVE 0xC9 NO; OPCODE LGDT 0x0F 0x01 /2 *NO M16 0x0F 0x01 /2 %NO M32 0x0F 0x01 /2 %NO M64; OPCODE SGDT 0x0F 0x01 /0 *NO M16 0x0F 0x01 /0 %NO M32 0x0F 0x01 /0 %NO M64; OPCODE LIDT 0x0F 0x01 /3 *NO M16 0x0F 0x01 /3 %NO M32 0x0F 0x01 /3 %NO M64; OPCODE SIDT 0x0F 0x01 /1 *NO M16 0x0F 0x01 /1 %NO M32 0x0F 0x01 /1 %NO M64; OPCODE LLDT 0x0F 0x00 /2 NO RM16; OPCODE SLDT 0x0F 0x00 /0 *NO RM16 0x0F 0x00 /0 %NO RM32 0x0F 0x00 /0 %NO RM64; OPCODE LMSW 0x0F 0x01 /6 NO RM16; OPCODE SMSW 0x0F 0x01 /4 *NO RM16 0x0F 0x01 /4 %NO RM32 0x0F 0x01 /4 %NO RM64; //OPCODE LGS LSS LFS LDS LES OPCODE LOCK 0xF0 NO; OPCODE LODSB 0xAC NO; OPCODE LODSW 0xAD *NO; OPCODE LODSD 0xAD %NO; OPCODE LODSQ 0xAD %=NO; OPCODE LOOP 0xE2 CB REL8; OPCODE LOOPE 0xE1 CB REL8; OPCODE LOOPZ 0xE1 CB REL8; OPCODE LOOPNE 0xE0 CB REL8; OPCODE LOOPNZ 0xE0 CB REL8; OPCODE LSL 0x0F 0x03 /R *NO R16 RM16 0x0F 0x03 /R %NO R32 RM32 0x0F 0x03 /R %NO R64 RM64; OPCODE LTR 0x0F 0x00 /3 NO RM16; OPCODE MOVSB 0xA4 NO; OPCODE MOVSW 0xA5 *NO; OPCODE MOVSD 0xA5 %NO; OPCODE MOVSQ 0xA5 %=NO; OPCODE MOVSX 0x0F 0xBE /R *NO R16 RM8 0x0F 0xBE /R %NO R32 RM8 0x0F 0xBE /R %NO R64 RM8 0x0F 0xBF /R %NO R32 RM16 0x0F 0xBF /R %NO R64 RM16; OPCODE MOVSXD 0x63 /R %NO R64 RM32; OPCODE MOVZX 0x0F 0xB6 /R *NO R16 RM8 0x0F 0xB6 /R %NO R32 RM8 0x0F 0xB6 /R %NO R64 RM8 0x0F 0xB7 /R %NO R32 RM16 0x0F 0xB7 /R %NO R64 RM16; OPCODE OUT 0xE6 IB UIMM8 AL 0xE7 *IB UIMM8 AX 0xE7 %IB UIMM8 EAX 0xEE NO DX AL 0xEF *NO DX AX 0xEF %NO DX EAX; OPCODE OUTSB 0x6E NO; OPCODE OUTSW 0x6F *NO; OPCODE OUTSD 0x6F %NO; OPCODE REP_INSB 0xF3 0x6C NO; OPCODE REP_INSW 0xF3 0x6D *NO; OPCODE REP_INSD 0xF3 0x6D %NO; OPCODE REP_MOVSB 0xF3 0xA4 NO; OPCODE REP_MOVSW 0xF3 0xA5 *NO; OPCODE REP_MOVSD 0xF3 0xA5 %NO; OPCODE REP_MOVSQ 0xF3 0x48 0xA5 %=NO; OPCODE REP_OUTSB 0xF3 0x6E NO; OPCODE REP_OUTSW 0xF3 0x6F *NO; OPCODE REP_OUTSD 0xF3 0x6F %NO; OPCODE REP_LODSB 0xF2 0xAC NO; OPCODE REP_LODSW 0xF2 0xAD *NO; OPCODE REP_LODSD 0xF2 0xAD %NO; OPCODE REP_LODSQ 0xF2 0x48 0xAD %=NO; OPCODE REP_STOSB 0xF3 0xAA NO; OPCODE REP_STOSW 0xF3 0xAB *NO; OPCODE REP_STOSD 0xF3 0xAB %NO; OPCODE REP_STOSQ 0xF3 0x48 0xAB %=NO; OPCODE REPE_CMPSB 0xF3 0x48 0xA6 NO; OPCODE REPE_CMPSW 0xF3 0xA7 *NO; OPCODE REPE_CMPSD 0xF3 0xA7 %NO; OPCODE REPE_CMPSQ 0xF3 0x48 0xA7 %=NO; OPCODE REPE_SCASB 0xF3 0xAE NO; OPCODE REPE_SCASW 0xF3 0xAF *NO; OPCODE REPE_SCASD 0xF3 0xAF %NO; OPCODE REPE_SCASQ 0xF3 0x48 0xAF %=NO; OPCODE REPNE_CMPSB 0xF2 0x48 0xA6 NO; OPCODE REPNE_CMPSW 0xF2 0xA7 *NO; OPCODE REPNE_CMPSD 0xF2 0xA7 %NO; OPCODE REPNE_CMPSQ 0xF2 0x48 0xA7 %=NO; OPCODE REPNE_SCASB 0xF2 0xAE NO; OPCODE REPNE_SCASW 0xF2 0xAF *NO; OPCODE REPNE_SCASD 0xF2 0xAF %NO; OPCODE REPNE_SCASQ 0xF2 0x48 0xAF %=NO; OPCODE RET 0xC3 NO; OPCODE RET1 0xC2 IW IMM16; OPCODE RETF 0xCB NO; OPCODE RETF1 0xCA IW IMM16; OPCODE REX 0x48 NO; OPCODE REX2 0x40 NO; OPCODE RSM 0x0F 0xAA NO; OPCODE SAHF 0x9E NO; OPCODE SCASB 0xAE NO; OPCODE SCASW 0xAF *NO; OPCODE SCASD 0xAF %NO; OPCODE SCASQ 0xAF %=NO; OPCODE SEGCS 0x2E NO; OPCODE SEGSS 0x36 NO; OPCODE SEGDS 0x3E NO; OPCODE SEGES 0x26 NO; OPCODE SEGFS 0x64 NO; OPCODE SEGGS 0x65 NO; OPCODE SETA 0x0F 0x97 NO RM8; OPCODE SETAE 0x0F 0x93 NO RM8; OPCODE SETB 0x0F 0x92 NO RM8; OPCODE SETBE 0x0F 0x96 NO RM8; OPCODE SETC 0x0F 0x92 NO RM8; OPCODE SETE 0x0F 0x94 NO RM8; OPCODE SETG 0x0F 0x9F NO RM8; OPCODE SETGE 0x0F 0x9D NO RM8; OPCODE SETL 0x0F 0x9C NO RM8; OPCODE SETLE 0x0F 0x9E NO RM8; OPCODE SETNA 0x0F 0x96 NO RM8; OPCODE SETNAE 0x0F 0x92 NO RM8; OPCODE SETNB 0x0F 0x93 NO RM8; OPCODE SETNBE 0x0F 0x97 NO RM8; OPCODE SETNC 0x0F 0x93 NO RM8; OPCODE SETNE 0x0F 0x95 NO RM8; OPCODE SETNG 0x0F 0x9E NO RM8; OPCODE SETNGE 0x0F 0x9C NO RM8; OPCODE SETNL 0x0F 0x9D NO RM8; OPCODE SETNLE 0x0F 0x9F NO RM8; OPCODE SETNO 0x0F 0x91 NO RM8; OPCODE SETNP 0x0F 0x9B NO RM8; OPCODE SETNS 0x0F 0x99 NO RM8; OPCODE SETNZ 0x0F 0x95 NO RM8; OPCODE SETO 0x0F 0x90 NO RM8; OPCODE SETP 0x0F 0x9A NO RM8; OPCODE SETPE 0x0F 0x9A NO RM8; OPCODE SETPO 0x0F 0x9B NO RM8; OPCODE SETS 0x0F 0x98 NO RM8; OPCODE SETZ 0x0F 0x94 NO RM8; OPCODE SHLD 0x0F 0xA5 /R *NO RM16 R16 0x0F 0xA5 /R %NO RM32 R32 0x0F 0xA5 /R %NO RM64 R64; OPCODE SHRD 0x0F 0xAD /R *NO RM16 R16 0x0F 0xAD /R %NO RM32 R32 0x0F 0xAD /R %NO RM64 R64; OPCODE STC 0xF9 NO; OPCODE STD 0xFD NO; OPCODE STI 0xFB NO; OPCODE STOSB 0xAA NO; OPCODE STOSW 0xAB *NO; OPCODE STOSD 0xAB %NO; OPCODE STOSQ 0xAB %=NO; OPCODE STR 0x0F 0x00 /1 *NO RM16 0x0F 0x00 /1 %NO RM32 0x0F 0x00 /1 %NO RM64; OPCODE VERR 0x0F 0x00 /4 *NO RM16 0x0F 0x00 /4 %NO RM32 0x0F 0x00 /4 %NO RM64; OPCODE VERW 0x0F 0x00 /5 *NO RM16 0x0F 0x00 /5 %NO RM32 0x0F 0x00 /5 %NO RM64; OPCODE WAIT 0x9B NO; OPCODE FWAIT 0x9B NO; OPCODE XADD 0x0F 0xC0 /R NO RM8 R8 0x0F 0xC1 /R *NO RM16 R16 0x0F 0xC1 /R %NO RM32 R32 0x0F 0xC1 /R %NO RM64 R64; OPCODE XLATB 0xD7 NO; OPCODE RCL 0xD2 /2 NO RM8 CL 0xD3 /2 *NO RM16 CL 0xD3 /2 %NO RM32 CL 0xD3 /2 %NO RM64 CL 0xC0 /2 IB RM8 UIMM8 0xC1 /2 *IB RM16 UIMM8 0xC1 /2 %IB RM32 UIMM8 0xC1 /2 %IB RM64 UIMM8; OPCODE RCL1 0xD0 /2 NO RM8 0xD1 /2 *NO RM16 0xD1 /2 %NO RM32 0xD1 /2 %NO RM64; OPCODE RCR 0xD2 /3 NO RM8 CL 0xD3 /3 *NO RM16 CL 0xD3 /3 %NO RM32 CL 0xD3 /3 %NO RM64 CL 0xC0 /3 IB RM8 UIMM8 0xC1 /3 *IB RM16 UIMM8 0xC1 /3 %IB RM32 UIMM8 0xC1 /3 %IB RM64 UIMM8; OPCODE RCR1 0xD0 /3 NO RM8 0xD1 /3 *NO RM16 0xD1 /3 %NO RM32 0xD1 /3 %NO RM64; OPCODE ROL 0xD2 /0 NO RM8 CL 0xD3 /0 *NO RM16 CL 0xD3 /0 %NO RM32 CL 0xD3 /0 %NO RM64 CL 0xC0 /0 IB RM8 UIMM8 0xC1 /0 *IB RM16 UIMM8 0xC1 /0 %IB RM32 UIMM8 0xC1 /0 %IB RM64 UIMM8; OPCODE ROL1 0xD0 /0 NO RM8 0xD1 /0 *NO RM16 0xD1 /0 %NO RM32 0xD1 /0 %NO RM64; OPCODE ROR 0xD2 /1 NO RM8 CL 0xD3 /1 *NO RM16 CL 0xD3 /1 %NO RM32 CL 0xD3 /1 %NO RM64 CL 0xC0 /1 IB RM8 UIMM8 0xC1 /1 *IB RM16 UIMM8 0xC1 /1 %IB RM32 UIMM8 0xC1 /1 %IB RM64 UIMM8; OPCODE ROR1 0xD0 /1 NO RM8 0xD1 /1 *NO RM16 0xD1 /1 %NO RM32 0xD1 /1 %NO RM64; OPCODE SAL 0xD2 /4 NO RM8 CL 0xD3 /4 *NO RM16 CL 0xD3 /4 %NO RM32 CL 0xD3 /4 %NO RM64 CL 0xC0 /4 IB RM8 UIMM8 0xC1 /4 *IB RM16 UIMM8 0xC1 /4 %IB RM32 UIMM8 0xC1 /4 %IB RM64 UIMM8; OPCODE SAL1 0xD0 /4 NO RM8 0xD1 /4 *NO RM16 0xD1 /4 %NO RM32 0xD1 /4 %NO RM64; OPCODE SAR 0xD2 /7 NO RM8 CL 0xD3 /7 *NO RM16 CL 0xD3 /7 %NO RM32 CL 0xD3 /7 %NO RM64 CL 0xC0 /7 IB RM8 UIMM8 0xC1 /7 *IB RM16 UIMM8 0xC1 /7 %IB RM32 UIMM8 0xC1 /7 %IB RM64 UIMM8; OPCODE SAR1 0xD0 /7 NO RM8 0xD1 /7 *NO RM16 0xD1 /7 %NO RM32 0xD1 /7 %NO RM64; OPCODE SHL 0xD2 /4 NO RM8 CL 0xD3 /4 *NO RM16 CL 0xD3 /4 %NO RM32 CL 0xD3 /4 %NO RM64 CL 0xC0 /4 IB RM8 UIMM8 0xC1 /4 *IB RM16 UIMM8 0xC1 /4 %IB RM32 UIMM8 0xC1 /4 %IB RM64 UIMM8; OPCODE SHL1 0xD0 /4 NO RM8 0xD1 /4 *NO RM16 0xD1 /4 %NO RM32 0xD1 /4 %NO RM64; OPCODE SHR 0xD2 /5 NO RM8 CL 0xD3 /5 *NO RM16 CL 0xD3 /5 %NO RM32 CL 0xD3 /5 %NO RM64 CL 0xC0 /5 IB RM8 UIMM8 0xC1 /5 *IB RM16 UIMM8 0xC1 /5 %IB RM32 UIMM8 0xC1 /5 %IB RM64 UIMM8; OPCODE SHR1 0xD0 /5 NO RM8 0xD1 /5 *NO RM16 0xD1 /5 %NO RM32 0xD1 /5 %NO RM64; OPCODE FILD 0xDF /0 NO M16 //Load I16 0xDB /0 NO M32 //Load I32 0xDF /5 `NO M64; //Load I64 OPCODE FISTP 0xDF /7 `NO M64; //Store I64 OPCODE FISTTP 0xDD /1 `NO M64; //Store I64 OPCODE FLD 0xD9 /0 NO M32 //Load F4 0xDD /0 `NO M64 //Load F64 0xD9 0xC0 +:I STI; OPCODE FSTP 0xD9 /3 NO M32 //Store F4 0xDD /3 `NO M64 //Store F64 0xDD 0xD8 +:I STI; OPCODE FST 0xD9 /2 NO M32 //Store F4 0xDD /2 `NO M64 //Store F64 0xDD 0xD0 +:I STI; OPCODE FRSTOR 0xDD /4 NO M32 0xDD /4 NO M64; OPCODE FSAVE 0xDD /6 NO M32 0xDD /6 NO M64; OPCODE FYL2X 0xD9 0xF1 :NO; OPCODE FYL2XP1 0xD9 0xF9 :NO; OPCODE F2XM1 0xD9 0xF0 :NO; OPCODE FABS 0xD9 0xE1 :NO; OPCODE FCHS 0xD9 0xE0 :NO; OPCODE FSIN 0xD9 0xFE :NO; OPCODE FCOS 0xD9 0xFF :NO; OPCODE FPTAN 0xD9 0xF2 :NO; OPCODE FPATAN 0xD9 0xF3 :NO; OPCODE FSQRT 0xD9 0xFA :NO; OPCODE FMULP 0xDE 0xC8 +:I STI ST0; OPCODE FMUL 0xD8 /1 NO ST0 M32 0xDC /1 `NO ST0 M64 0xD8 0xC8 +:I ST0 STI 0xDC 0xC8 +:I STI ST0; OPCODE FIMUL 0xDA /1 NO ST0 M32 0xDE /1 NO ST0 M16; OPCODE FDIVP 0xDE 0xF8 +:I STI ST0; OPCODE FDIV 0xD8 /6 NO ST0 M32 0xDC /6 `NO ST0 M64 0xD8 0xF0 +:I ST0 STI 0xDC 0xF8 +:I STI ST0; OPCODE FDIVRP 0xDE 0xF0 +:I STI ST0; OPCODE FDIVR 0xD8 /7 NO ST0 M32 0xDC /7 `NO ST0 M64 0xD8 0xF8 +:I ST0 STI 0xDC 0xF0 +:I STI ST0; OPCODE FPREM 0xD9 0xF8 :NO; OPCODE FADDP 0xDE 0xC0 +:I STI ST0; OPCODE FADD 0xD8 /0 NO ST0 M32 0xDC /0 `NO ST0 M64 0xD8 0xC0 +:I ST0 STI 0xDC 0xC0 +:I STI ST0; OPCODE FSUBP 0xDE 0xE8 +:I STI ST0; OPCODE FSUB 0xD8 /4 NO ST0 M32 0xDC /4 `NO ST0 M64 0xD8 0xE0 +:I ST0 STI 0xDC 0xE8 +:I STI ST0; OPCODE FSUBRP 0xDE 0xE0 +:I STI ST0; OPCODE FSUBR 0xD8 /5 NO ST0 M32 0xDC /5 `NO ST0 M64 0xD8 0xE8 +:I ST0 STI 0xDC 0xE0 +:I STI ST0; OPCODE FCOMIP 0xDF 0xF0 +:I ST0 STI; OPCODE FCOMI 0xDB 0xF0 +:I ST0 STI; OPCODE FCLEX 0x9B 0xDB 0xE2 :NO; OPCODE FNCLEX 0xDB 0xE2 :NO; OPCODE FSTSW 0xDF 0xE0 :NO; OPCODE FDECSTP 0xD9 0xF6 :NO; OPCODE FINCSTP 0xD9 0xF7 :NO; OPCODE FFREE 0xDD 0xC0 +:I STI; OPCODE FRNDINT 0xD9 0xFC :NO; OPCODE FSCALE 0xD9 0xFD :NO; OPCODE FXTRACT 0xD9 0xF4 :NO; OPCODE FLD1 0xD9 0xE8 :NO; OPCODE FLDL2T 0xD9 0xE9 :NO; OPCODE FLDL2E 0xD9 0xEA :NO; OPCODE FLDPI 0xD9 0xEB :NO; OPCODE FLDLG2 0xD9 0xEC :NO; OPCODE FLDLN2 0xD9 0xED :NO; OPCODE FLDZ 0xD9 0xEE :NO; OPCODE FXCH 0xD9 0xC8 +:I STI; OPCODE FTST 0xD9 0xE4 :NO; OPCODE FXAM 0xD9 0xE5 :NO; OPCODE FINIT 0x9B 0xDB 0xE3 NO; OPCODE FNINIT 0xDB 0xE3 NO; OPCODE FSTCW 0xD9 /7 NO M16; OPCODE FLDCW 0xD9 /5 NO M16; OPCODE FXSAVE //512 byte 0x0F 0xAE /0 %NO M32 0x0F 0xAE /0 %NO M64; OPCODE FXRSTOR //512 byte 0x0F 0xAE /1 %NO M32 0x0F 0xAE /1 %NO M64; OPCODE WBINVD 0x0F 0x09 NO; OPCODE CLFLUSH 0x0F 0xAE /7 NO RM8; OPCODE INVLPG 0x0F 0x01 /7 NO RM8; OPCODE CPUID 0x0F 0xA2 %=NO; OPCODE WRMSR 0x0F 0x30 %=NO; OPCODE RDTSC 0x0F 0x31 NO; OPCODE RDMSR 0x0F 0x32 %=NO; OPCODE PAUSE 0xF3 0x90 NO; OPCODE MOV_CR0_EAX 0x0F 0x22 0xC0 NO; OPCODE MOV_EAX_CR0 0x0F 0x20 0xC0 NO; OPCODE MOV_CR2_EAX 0x0F 0x22 0xD0 NO; OPCODE MOV_EAX_CR2 0x0F 0x20 0xD0 NO; OPCODE MOV_CR3_EAX 0x0F 0x22 0xD8 NO; OPCODE MOV_EAX_CR3 0x0F 0x20 0xD8 NO; OPCODE MOV_CR4_EAX 0x0F 0x22 0xE0 NO; OPCODE MOV_EAX_CR4 0x0F 0x20 0xE0 NO; OPCODE MOV_CR0_RAX 0x0F 0x22 0xC0 %=NO; OPCODE MOV_RAX_CR0 0x0F 0x20 0xC0 %=NO; OPCODE MOV_CR2_RAX 0x0F 0x22 0xD0 %=NO; OPCODE MOV_RAX_CR2 0x0F 0x20 0xD0 %=NO; OPCODE MOV_CR3_RAX 0x0F 0x22 0xD8 %=NO; OPCODE MOV_RAX_CR3 0x0F 0x20 0xD8 %=NO; OPCODE MOV_CR4_RAX 0x0F 0x22 0xE0 %=NO; OPCODE MOV_RAX_CR4 0x0F 0x20 0xE0 %=NO;